Software/Hardware Co-design: Crypto MicroCore

dc.accessRightsAnonymous
dc.audiencePraxis
dc.contributor.authorNicola, Carlo U.
dc.contributor.authorKnecht, Markus
dc.contributor.authorMeier, Willi
dc.contributor.authorSchleisiek, Klaus
dc.date.accessioned2016-05-23T13:13:55Z
dc.date.available2016-05-23T13:13:55Z
dc.date.issued2014-12
dc.description.abstractMicroCore is a dual stack, Harvard architecture with three memory areas that can be accessed in parallel. One special feature of MicroCore is the possibility to define more complex Forth words by creating new CPU instructions that later can be implemented via VHDL in FPGA hardware. In our project we developed a new version of the MicroCore C-compiler based on lcc, a fully ANSI-C compliant compiler. The compiler generates from C-Code MicroCore instructions for the 1.71 version which are sent to the target hardware with the MicroForth-loader. We built in optimizations for the global stack allocations, first suggested by the group of Chris Bayley at the University of York. We tested our compiler with the BLAKE hash algorithm, implemented both in compiled MicroCore code and with BLAKE-optimized instructions directly coded in hardware via VHDL.
dc.description.urihttp://www.fhnw.ch/technik/imvs/publikationen/artikel-2014/fokusreport_nicola.pdf
dc.identifier.issn2296-4169
dc.identifier.issn1662-2014
dc.identifier.urihttp://hdl.handle.net/11654/17869
dc.identifier.urihttps://doi.org/10.26041/fhnw-633
dc.language.isoenen_US
dc.relation.ispartofIMVS Fokus Reporten_US
dc.subjectForth
dc.subjectextended CPU instructions
dc.subjectC compiler
dc.subjectIcc
dc.subjectMicroCore instruction
dc.subjectBLAKE hash algorithm
dc.subject.ddc005 - Computer Programmierung, Programme und Datende
dc.subject.ddc600 - Technikde
dc.subject.ddc004 - Computer Wissenschaften, Internetde
dc.titleSoftware/Hardware Co-design: Crypto MicroCore
dc.type01B - Beitrag in Magazin oder Zeitung
dc.volume8
dspace.entity.typePublication
fhnw.InventedHereYes
fhnw.IsStudentsWorkno
fhnw.PublishedSwitzerlandYes
fhnw.ReviewTypeLectoring (ex ante)
fhnw.affiliation.hochschuleHochschule für Technikde_CH
fhnw.affiliation.institutInstitut für Mobile und Verteilte Systemede_CH
fhnw.pagination39-46
fhnw.publicationOnlineJa
fhnw.publicationStatePublished
relation.isAuthorOfPublication9b425249-9a7f-49e8-a0e5-13432fe634cc
relation.isAuthorOfPublication3649d208-8491-4eca-bd4e-574d8c3ae4e1
relation.isAuthorOfPublication.latestForDiscovery9b425249-9a7f-49e8-a0e5-13432fe634cc
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