A subthreshold 30pJ/bit self-timed ring based true random number generator for internet of everything
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Author (Corporation)
Publication date
08.03.2018
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Type
04B - Conference paper
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Parent work
2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
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DOI of the original publication
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Series number
Volume
Issue / Number
Pages / Duration
1-3
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Publisher / Publishing institution
IEEE
Place of publication / Event location
Burlingame
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Abstract
This paper presents a true random number generator that exploits the subthreshold properties of jitter of events propagating in a self-timed ring and jitter of events propagating in an inverter based ring oscillator. Design was implemented in 180nm CMOS flash process. Devices provide high quality random bit sequences passing FIPS 140-2 and NIST SP 800-22 statistical tests which guaranty uniform distribution and unpredictability thanks to the physics based entropy source.
Keywords
Ring oscillators, Generators, Jitter, Entropy, Logic gates, NIST, Cryptography, PVT variation, noise, oscillator, security, true random number generator (TRNG)
Subject (DDC)
Event
IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S)
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ISBN
978-1-5386-3766-1
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Language
English
Created during FHNW affiliation
No
Strategic action fields FHNW
Publication status
Published
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Peer review of the complete publication
Open access category
Closed
License
Citation
Coustans, M., Terrier, C., Eberhardt, T., Salgado, S., Cherkaoui, A., & Fesquet, L. (2018). A subthreshold 30pJ/bit self-timed ring based true random number generator for internet of everything. 2017 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S), 1–3. https://doi.org/10.1109/S3S.2017.8308742