Hardware acceleration of digital filters using the STM32 FMAC peripheral - a performance comparison

Abstract

Filters are a fundamental component of signal processing, and an increasing number of them are implemented digitally. While digital implementations offer increased flexibility they simultaneously set higher demands on microcontrollers. As a result selected generations of recent STM32 microcontrollers ship with a Filter Math Accelerator (FMAC) peripheral which allows to offload the filtering from the CPU. This letter provides a performance and accuracy comparison of the FMAC peripheral in single section and second order sections configuration to the widely adopted CMSIS-DSP software implementation. The results show that depending on configuration, filter order and data type the FMAC reduces CPU usage up to 99% - at the cost of accuracy - thus making it ideal for applications where concurrent tasks have to be executed.