Low Power Sampling Latch for up to 25\,Gb/s 2x Oversampling CDR in 90\mbox-nm CMOS
dc.contributor.author | von Bueren, Georg | |
dc.contributor.author | Rodoni, Lucio | |
dc.contributor.author | Kormer, Christian | |
dc.contributor.author | Jäckel, Heinz | |
dc.contributor.author | Huber, Alexander | |
dc.contributor.author | Morf, Thomas | |
dc.date.accessioned | 2016-04-06T14:25:37Z | |
dc.date.available | 2016-04-06T14:25:37Z | |
dc.date.issued | 2006 | |
dc.identifier.uri | http://hdl.handle.net/11654/17731 | |
dc.relation.ispartof | Proc. ESSCIRC | |
dc.spatial | Montreux | |
dc.title | Low Power Sampling Latch for up to 25\,Gb/s 2x Oversampling CDR in 90\mbox-nm CMOS | |
dc.type | 04B - Beitrag Konferenzschrift | |
dspace.entity.type | Publication | |
fhnw.InventedHere | Yes | |
fhnw.affiliation.hochschule | Hochschule für Technik | de_CH |
fhnw.affiliation.institut | lnstitut für Sensorik und Elektronik | de_CH |
fhnw.pagination | 106-109 | |
relation.isAuthorOfPublication | 911e2394-19ba-4b7d-b8bc-84e2a01e8e53 | |
relation.isAuthorOfPublication.latestForDiscovery | 911e2394-19ba-4b7d-b8bc-84e2a01e8e53 |