Variability of Low Frequency Noise and mismatch in enclosed-gate and standard nMOSFETs

Variability of Low Frequency Noise (LFN) and Random Telegraph Noise (RTN) is an important concern for many analog CMOS integrated circuits. In this paper, transistors with enclosed gate layout are examined and compared with standard layout transistors, with particular emphasis on weak inversion region. Enclosed gate transistors show an improved gate voltage mismatch in weak inversion. A compact MOSFET model for LFN and its variability, based on number fluctuation theory, is shown to cover well the behavior of either type of transistors. Lower levels of noise as well as lower variability of noise are observed in enclosed gate transistors.

Schlagwörter

Logic gates, Standards, MOSFET, Semiconductor device modeling, Low-frequency noise, Layout

Fachgebiet (DDC)

620 - Ingenieurwissenschaften und Maschinenbau

Projekt

Veranstaltung

IEEE International Conference of Microelectronic Test Structures (ICMTS)

Startdatum der Ausstellung

Enddatum der Ausstellung

Startdatum der Konferenz

Enddatum der Konferenz

Datum der letzten Prüfung

ISBN

978-1-5090-3615-8

ISSN

Sprache

Englisch

Während FHNW Zugehörigkeit erstellt

Nein

Zukunftsfelder FHNW

Publikationsstatus

Veröffentlicht

Begutachtung

Peer-Review der ganzen Publikation

Open Access-Status

Closed

Lizenz

Zitation

Bucher, M., Nikolaou, A., Mavredakis, N., Makris, N., Coustans, M., Lolivier, J., Habas, P., Acovic, A., & Meyer, R. (2017). Variability of Low Frequency Noise and mismatch in enclosed-gate and standard nMOSFETs. 2017 International Conference of Microelectronic Test Structures (ICMTS), 1–4. https://doi.org/10.1109/ICMTS.2017.7954285

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